A few days ago, the special integrated circuit and system laboratory of the Institute of Microelectronics of the Chinese Academy of Sciences made a breakthrough in the research project of "power battery monitoring chip".
At present, with the shortage of traditional energy sources and the increasing pollution of the environment, energy-saving and environmentally friendly new energy industries are increasingly valued by countries. In the development of new energy, the demand for high-power battery packs is increasing. In order to meet the energy demand of high power, battery packs are usually connected by dozens or even hundreds of single cells in series to provide energy. Due to the differences between the single cells, the continuous charge and discharge cycles in actual use will cause the difference of the single cells to accumulate, which ultimately reduces the usable power of the battery pack and shortens the battery life. In order to obtain the best performance and the longest service life of the battery pack under various working conditions, the battery management system (BMS) is used in engineering applications to monitor the parameters and status of the battery pack. As the key link between the management system and the battery pack, the battery pack monitoring chip determines the overall performance of the management system and is one of the most important core components in the battery pack management system.
With the support of the National Science and Technology Major Project and the Chinese Academy of Sciences ’Support Service for the National Strategic Emerging Industry Program, the Chinese Academy of Sciences’ R & D team has carried out research on the key technologies of battery pack monitoring chips and completed a high-precision, balanced control for power battery pack Development of monitoring chip BM303. The chip adopts a single chip that can monitor 8 serial cells, cascade communication between chips through a high-voltage interface, and a stackable architecture that can monitor up to hundreds of cells. The chip integrates a high-precision analog circuit with filter processing and a large Scale digital logic control circuit.
During the project, the R & D team overcame technical problems such as battery information sampling at high common mode voltage, cascade communication and collaboration mechanism, special ESD design, high-precision reference source, high-precision ADC, equalization control strategy, and digital control strategy. Implement tape-out. The actual measurement results show that the maximum measurement error of the chip is within 2.1 ‰, which can perform on-chip equalization and external discrete component equalization, and cascade communication between the chips. It not only supports alarm and protection of various battery information, but also supports online diagnosis and Fault detection, etc., can achieve intelligent monitoring and management of battery packs. In the reliability test, it passed the ESD test under HBM mode 2000V (Class2), CDM mode 1000V (Class4), MM mode 200V (Class2).
According to the research team of the project, the functions and performance indicators of the monitoring chip have reached the domestic leading level. The chip can already provide engineering samples, the chip data specifications and user manuals and other related documents have also been perfected, the chip and the system are being Carry out product application and promotion. In the next step, the R & D team continued to optimize and improve the chip and its system based on key technologies such as accurate sampling, detection, transmission, and equalization control of battery information under high common-mode voltage. Further explore the digital-analog hybrid high-performance battery pack chip integration technology to achieve the core technological breakthrough of battery pack intelligent management, laying the foundation for the localization and industrialization of this "battery pack monitoring chip".
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